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1

Systematic Poisoning Attacks on and Defenses for Machine Learning in Healthcare

Mozaffari Kermani, Mehran, Sur-Kolay, Susmita, Raghunathan, Anand, Jha, Niraj

Journal:

IEEE Journal of Biomedical and Health Informatics

Year:

2014

Language:

english

File:

PDF, 544 KB

english, 2014

2

CABA: Continuous Authentication Based on BioAura

Mosenia, Arsalan, SUR-KOLAY, SUSMITA, Raghunathan, Anand, Jha, Niraj K.

Journal:

IEEE Transactions on Computers

Year:

2016

Language:

english

File:

PDF, 2.90 MB

english, 2016

3

Fundamentals of IP and SoC Security || SoC Security and Debug

Bhunia, Swarup, Ray, Sandip, Sur-Kolay, Susmita

Year:

2017

Language:

english

File:

PDF, 464 KB

english, 2017

4

Quantum error-correcting code for ternary logic

Majumdar, Ritajit, Basu, Saikat, Ghosh, Shibashis, Sur-Kolay, Susmita

Journal:

Physical Review A

Year:

2018

Language:

english

File:

PDF, 228 KB

english, 2018

5

[IEEE 2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) - Miami, FL, USA (2019.7.15-2019.7.17)] 2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) - Minimization of Flare in EUVL by Simultaneous Wire Segment Perturbation and Dummification

Paul, Sudipta, Banerjee, Pritha, Sur-Kolay, Susmita

Year:

2019

Language:

english

File:

PDF, 243 KB

english, 2019

6

MAkE: Multiobjective algorithm for k-way equipartitioning of a point set

Sriparna Saha, Susmita Sur-Kolay, Parthasarathi Dasgupta, Sanghamitra Bandyopadhyay

Journal:

Applied Soft Computing

Year:

2009

Language:

english

File:

PDF, 1.67 MB

english, 2009

7

Updation of Activation Sequence of a Chip after its Deployment for Access Control

Saha, Debasri, Sur-Kolay, Susmita

Journal:

Procedia Technology

Year:

2013

Language:

english

File:

PDF, 137 KB

english, 2013

8

[IEEE 2014 27th International Conference on VLSI Design - India (2014.01.5-2014.01.9)] 2014 27th International Conference on VLSI Design and 2014 13th International Conference on Embedded Systems - Global Routing Using Monotone Staircases with Minimal Bends

Kar, Bapi, Sur-Kolay, Susmita, Mandal, Chittaranjan

Year:

2014

Language:

english

File:

PDF, 863 KB

english, 2014

9

[IEEE 2008 International Conference on Electronic Design (ICED 2008) - Penang, Malaysia (2008.12.1-2008.12.3)] 2008 International Conference on Electronic Design - Designing quantum adder circuits and evaluating their error performance

Chakrabarti, Amlan, Sur-Kolay, Susmita

Year:

2008

Language:

english

File:

PDF, 963 KB

english, 2008

10

[IEEE 2009 22nd International Conference on VLSI Design: concurrently with the 8th International Conference on Embedded Systems - New Delhi, India (2009.01.5-2009.01.9)] 2009 22nd International Conference on VLSI Design - Encoding of Floorplans through Deterministic Perturbation

Saha, Debasri, Sur-Kolay, Susmita

Year:

2009

Language:

english

File:

PDF, 227 KB

english, 2009

11

[IEEE 2007 International Conference on Computing: Theory and Applications (ICCTA'07) - Kolkata, India (2007.03.5-2007.03.7)] 2007 International Conference on Computing: Theory and Applications (ICCTA'07) - A Novel Scheme for Encoding and Watermark Embedding in VLSI Physical Design for IP Protection

Saha, Debasri, Dasgupta, Parthasarathi, Sur-Kolay, Susmita, Sen-Sarma, Samar

Year:

2007

Language:

english

File:

PDF, 156 KB

english, 2007

12

PAQCS: Physical Design-Aware Fault-Tolerant Quantum Circuit Synthesis

Lin, Chia-Chun, Sur-Kolay, Susmita, Jha, Niraj K.

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2015

Language:

english

File:

PDF, 5.58 MB

english, 2015

13

Watermarking in Hard Intellectual Property for Pre-Fab and Post-Fab Verification

Saha, Debasri, Sur-Kolay, Susmita

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2015

Language:

english

File:

PDF, 2.90 MB

english, 2015

14

[IEEE 10th International Conference on Information Technology (ICIT 2007) - Rourkela, Orissa, India (2007.12.17-2007.12.20)] 10th International Conference on Information Technology (ICIT 2007) - Fast Robust Intellectual Property Protection for VLSI Physical Design

Saha, Debasri, Sur-Kolay, Susmita

Year:

2007

Language:

english

File:

PDF, 474 KB

english, 2007

15

[IEEE 9th International Conference on Information Technology (ICIT'06) - Bhubaneswar, India (2006.12.18-2006.12.21)] 9th International Conference on Information Technology (ICIT'06) - Multiobjective Genetic Algorithm for k-way Equipartitioning of a Point Set with Application to CAD-VLSI

Saha, Sriparna, Sur-Kolay, Susmita, Bandyopadhyay, Sanghamitra, Dasgupta, Parthasarathi

Year:

2006

Language:

english

File:

PDF, 182 KB

english, 2006

16

[IEEE 2009 22nd International Conference on VLSI Design: concurrently with the 8th International Conference on Embedded Systems - New Delhi, India (2009.01.5-2009.01.9)] 2009 22nd International Conference on VLSI Design - Floorplanning for Partial Reconfiguration in FPGAs

Banerjee, Pritha, Sangtani, Megha, Sur-Kolay, Susmita

Year:

2009

Language:

english

File:

PDF, 199 KB

english, 2009

17

[IEEE 2014 18th International Symposium on VLSI Design and Test (VDAT) - Coimbatore, India (2014.7.16-2014.7.18)] 18th International Symposium on VLSI Design and Test - A novel architecture for QPSK modulation based on time-mode signal processing

Saha, Sumit, Kar, Bapi, Sur-Kolay, Susmita

Year:

2014

Language:

english

File:

PDF, 417 KB

english, 2014

18

[IEEE 2011 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) - Chennai, India (2011.07.4-2011.07.6)] 2011 IEEE Computer Society Annual Symposium on VLSI - TSV-aware Scan Chain Reordering for 3D IC

Datta, Ayan, Nagarajan, Charudhattan, Kolay, Susmita Sur

Year:

2011

Language:

english

File:

PDF, 712 KB

english, 2011

19

[IEEE 2013 International Symposium on Electronic System Design (ISED) - Singapore (2013.12.10-2013.12.12)] 2013 International Symposium on Electronic System Design - Modular Design for Symmetric Functions Using Quantum Quaternary Logic

Deb, Arighna, Das, Debesh K., Sur-Kolay, Susmita

Year:

2013

Language:

english

File:

PDF, 472 KB

english, 2013

20

[IEEE 2008 IEEE Region 10 and the Third international Conference on Industrial and Information Systems (ICIIS) - Kharagpur, India (2008.12.8-2008.12.10)] 2008 IEEE Region 10 and the Third international Conference on Industrial and Information Systems - An Analytical Approach to Direct IP Protection of VLSI Floorplans

Saha, Debasri, Sur-Kolay, Susmita

Year:

2008

Language:

english

File:

PDF, 134 KB

english, 2008

21

[IEEE 2014 IEEE 44th International Symposium on Multiple-Valued Logic (ISMVL) - Bremen, Germany (2014.5.19-2014.5.21)] 2014 IEEE 44th International Symposium on Multiple-Valued Logic - Synthesis of Ternary Grover's Algorithm

Mandal, Sudhindu Bikash, Chakrabarti, Amlan, Sur-Kolay, Susmita

Year:

2014

Language:

english

File:

PDF, 235 KB

english, 2014

22

[IEEE 2009 IEEE Computer Society Annual Symposium on VLSI - Tampa, Florida, USA (2009.05.13-2009.05.15)] 2009 IEEE Computer Society Annual Symposium on VLSI - Secure Leakage-Proof Public Verification of IP Marks in VLSI Physical Design

Saha, Debasri, Sur-Kolay, Susmita

Year:

2009

Language:

english

File:

PDF, 218 KB

english, 2009

23

[IEEE 2012 25th International Conference on VLSI Design. VLSI Design 2012. Held jointly with 11th International Conference on Embedded Systems - Hyderabad (2012.01.7-2012.01.11)] 2012 25th International Conference on VLSI Design - Tutorial T4: Intellectual Property Protection and Security in System-on-Chip Design

Sur-Kolay, Susmita, Bhunia, S.

Year:

2012

Language:

english

File:

PDF, 224 KB

english, 2012

24

[IEEE 2012 IEEE 25th International SOC Conference (SOCC) - Niagara Falls, NY, USA (2012.09.12-2012.09.14)] 2012 IEEE International SOC Conference - Intellectual property protection and security of SoCs — An embedded tutorial

Sur-Kolay, Susmita

Year:

2012

Language:

english

File:

PDF, 913 KB

english, 2012

25

[IEEE 2010 23rd International Conference on VLSI Design: concurrently with the 9th International Conference on Embedded Systems Design (VLSID) - Bangalore, India (2010.01.3-2010.01.7)] 2010 23rd International Conference on VLSI Design - A Unified Approach for IP Protection across Design Phases in a Packaged Chip

Saha, Debasri, Sur-Kolay, Susmita

Year:

2010

Language:

english

File:

PDF, 209 KB

english, 2010

26

[IEEE 20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07) - Bangalore, India (2007.01.6-2007.01.10)] 20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07) - Floorplanning in Modern FPGAs

Banerjee, Pritha, Sur-Kolay, Susmita, Bishnu, Arijit

Year:

2007

Language:

english

File:

PDF, 668 KB

english, 2007

27

Approximation algorithms for maximum independent set of a unit disk graph

Das, Gautam K., De, Minati, Kolay, Sudeshna, Nandy, Subhas C., Sur-Kolay, Susmita

Journal:

Information Processing Letters

Year:

2015

Language:

english

File:

PDF, 383 KB

english, 2015

28

[IEEE 2007 International Conference on Computing: Theory and Applications (ICCTA'07) - Kolkata, India (2007.03.5-2007.03.7)] 2007 International Conference on Computing: Theory and Applications (ICCTA'07) - Faster Placer for Island-Style FPGAs

Banerjee, Pritha, Sur-Kolay, Susmita

Year:

2007

Language:

english

File:

PDF, 132 KB

english, 2007

29

[IEEE 2011 VII Southern Conference on Programmable Logic (SPL) - Cordoba, Argentina (2011.04.13-2011.04.15)] 2011 VII Southern Conference on Programmable Logic (SPL) - Balanced bipartitioning of a multi-weighted hypergraph for heterogeneous FPGAS

Mukhopadhyay, Sagnik, Banerjee, Pritha, Sur-Kolay, Susmita

Year:

2011

Language:

english

File:

PDF, 244 KB

english, 2011

30

[IEEE 15th International Conference on Advanced Computing and Communications (ADCOM 2007) - Guwahati, Assam, India (2007.12.18-2007.12.21)] 15th International Conference on Advanced Computing and Communications (ADCOM 2007) - Rules for Synthesizing Quantum Boolean Circuits Using Minimized Nearest-Neighbour Templates

Chakrabarti, Amlan, Sur-Kolay, Susmita

Year:

2007

Language:

english

File:

PDF, 264 KB

english, 2007

31

[IEEE 2011 IEEE 41st International Symposium on Multiple-Valued Logic (ISMVL) - Tuusula, Finland (2011.05.23-2011.05.25)] 2011 41st IEEE International Symposium on Multiple-Valued Logic - Synthesis Techniques for Ternary Quantum Logic

Mandal, Sudhindu Bikash, Chakrabarti, Amlan, Sur-Kolay, Susmita

Year:

2011

Language:

english

File:

PDF, 214 KB

english, 2011

32

[IEEE 2012 International Conference on Computers and Devices for Communication (CODEC) - Kolkata, India (2012.12.17-2012.12.19)] 2012 5th International Conference on Computers and Devices for Communication (CODEC) - Planarization of metal layers in a chip based on Voronoi diagram

Saha, Debasri, Sur-Kolay, Susmita

Year:

2012

Language:

english

File:

PDF, 110 KB

english, 2012

33

[ACM Press the 9th Workshop - New Delhi, India (2014.10.12-2014.10.17)] Proceedings of the 9th Workshop on Embedded Systems Security - WESS '14 - Trusted sharing of intellectual property in electronic hardware design

Saha, Debasri, Sur-Kolay, Susmita

Year:

2014

Language:

english

File:

PDF, 133 KB

english, 2014

34

Manhattan-diagonal routing in channels and switchboxes

Das, Sandip, Sur-Kolay, Susmita, Bhattacharya, Bhargab B.

Journal:

ACM Transactions on Design Automation of Electronic Systems

Year:

2004

Language:

english

File:

PDF, 248 KB

english, 2004

35

Hierarchical partitioning of VLSI floorplans by staircases

Majumder, Subhashis, Sur-Kolay, Susmita, Bhattacharya, Bhargab B., Das, Swarup Kumar

Journal:

ACM Transactions on Design Automation of Electronic Systems

Year:

2007

Language:

english

File:

PDF, 504 KB

english, 2007

36

FPGA placement using space-filling curves

Banerjee, Pritha, Sur-Kolay, Susmita, Bishnu, Arijit, Das, Sandip, Nandy, Subhas C., Bhattacharjee, Subhasis

Journal:

ACM Transactions on Embedded Computing Systems

Year:

2009

Language:

english

File:

PDF, 327 KB

english, 2009

37

[ACM Press the 1997 international symposium - Napa Valley, California, United States (1997.04.14-1997.04.16)] Proceedings of the 1997 international symposium on Physical design - ISPD '97 - Slicibility of rectangular graphs and floorplan optimization

Dasgupta, Partha S., Sur-Kolay, Susmita

Year:

1997

Language:

english

File:

PDF, 785 KB

english, 1997

38

Slicible rectangular graphs and their optimal floorplans

Dasgupta, Parthasarathi, Sur-Kolay, Susmita

Journal:

ACM Transactions on Design Automation of Electronic Systems

Year:

2001

Language:

english

File:

PDF, 261 KB

english, 2001

39

[ACM Press the 14th international symposium - Montr?al, P.Q., Canada (2001.09.30-2001.10.03)] Proceedings of the 14th international symposium on Systems synthesis - ISSS '01 - Combined instruction and loop parallelism in array synthesis for FPGAs

Derrien, Steven, Rajopadhye, Sanjay, Kolay, Susmita Sur

Year:

2001

Language:

english

File:

PDF, 184 KB

english, 2001

40

Physiological Information Leakage: A New Frontier in Health Information Security

Nia, Arsalan, Sur-Kolay, Susmita, Raghunathan, Anand, Jha, Niraj

Journal:

IEEE Transactions on Emerging Topics in Computing

Year:

2015

Language:

english

File:

PDF, 4.58 MB

english, 2015

41

[IEEE 2015 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) - Daejeon, South Korea (2015.10.5-2015.10.7)] 2015 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) - Flare reduction in EUV Lithography by perturbation of wire segments

Paul, Sudipta, Banerjee, Pritha, Sur-Kolay, Susmita

Year:

2015

Language:

english

File:

PDF, 737 KB

english, 2015

42

Energy-Efficient Long-term Continuous Personal Health Monitoring

Nia, Arsalan Mohsen, Mozaffari-Kermani, Mehran, Sur-Kolay, Susmita, Raghunathan, Anand, Jha, Niraj K.

Journal:

IEEE Transactions on Multi-Scale Computing Systems

Year:

2015

Language:

english

File:

PDF, 2.91 MB

english, 2015

43

[IEEE 2015 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) - Montpellier, France (2015.7.8-2015.7.10)] 2015 IEEE Computer Society Annual Symposium on VLSI - A New Method for Defining Monotone Staircases in VLSI Floorplans

Kar, Bapi, Sur-Kolay, Susmita, Mandal, Chittarnjan

Year:

2015

Language:

english

File:

PDF, 223 KB

english, 2015

44

[IEEE 2016 29th International Conference on VLSI Design and 2016 15th International Conference on Embedded Systems (VLSID) - Kolkata, India (2016.1.4-2016.1.8)] 2016 29th International Conference on VLSI Design and 2016 15th International Conference on Embedded Systems (VLSID) - A Novel EPE Aware Hybrid Global Route Planner after Floorplanning

Kar, Bapi, Sur-Kolay, Susmita, Mandal, Chittaranjan

Year:

2016

Language:

english

File:

PDF, 166 KB

english, 2016

45

[IEEE 10th International Conference on Information Technology (ICIT 2007) - Rourkela, Orissa, India (2007.12.17-2007.12.20)] 10th International Conference on Information Technology (ICIT 2007) - Fast Robust Intellectual Property Protection for VLSI Physical Design

Saha, Debasri, Sur-Kolay, Susmita

Year:

2007

Language:

english

File:

PDF, 474 KB

english, 2007

46

Embedding of signatures in reconfigurable scan architecture for authentication of intellectual properties in system-on-chip

Sur-Kolay, Susmita, Saha, Debasri

Journal:

IET Computers & Digital Techniques

Year:

2016

Language:

english

File:

PDF, 818 KB

english, 2016

47

Fundamentals of IP and SoC Security ||

Bhunia, Swarup, Ray, Sandip, Sur-Kolay, Susmita

Year:

2017

Language:

english

File:

PDF, 8.28 MB

english, 2017

48

Fundamentals of IP and SoC Security || Security Validation in Modern SoC Designs

Bhunia, Swarup, Ray, Sandip, Sur-Kolay, Susmita

Year:

2017

Language:

english

File:

PDF, 489 KB

english, 2017

49

Fundamentals of IP and SoC Security || FPGA-Based IP and SoC Security

Bhunia, Swarup, Ray, Sandip, Sur-Kolay, Susmita

Year:

2017

Language:

english

File:

PDF, 627 KB

english, 2017

50

Fundamentals of IP and SoC Security || In-place Logic Obfuscation for Emerging Nonvolatile FPGAs

Bhunia, Swarup, Ray, Sandip, Sur-Kolay, Susmita

Year:

2017

Language:

english

File:

PDF, 890 KB

english, 2017

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